{"id":776,"date":"2021-02-09T12:07:09","date_gmt":"2021-02-09T04:07:09","guid":{"rendered":"http:\/\/47.91.14.247\/?page_id=776"},"modified":"2021-02-09T12:26:26","modified_gmt":"2021-02-09T04:26:26","slug":"fpga-dsp","status":"publish","type":"page","link":"https:\/\/www.zkey-tech.com\/index.php\/fpga-dsp\/","title":{"rendered":"FPGA &#038; DSP"},"content":{"rendered":"<p>[vc_row full_width=&#8221;stretch_row&#8221; parallax=&#8221;content-moving&#8221; parallax_image=&#8221;56&#8243; css=&#8221;.vc_custom_1506680193286{padding-top: 128px !important;padding-bottom: 128px !important;}&#8221;][vc_column][vc_custom_heading text=&#8221;FPGA &amp; DSP&#8221; font_container=&#8221;tag:h1|text_align:center|color:%23ffffff&#8221; use_theme_fonts=&#8221;yes&#8221; css=&#8221;.vc_custom_1612843567593{margin-bottom: 0px !important;}&#8221;][\/vc_column][\/vc_row][vc_row css=&#8221;.vc_custom_1506680283788{padding-top: 30px !important;padding-bottom: 12px !important;}&#8221;][vc_column width=&#8221;2\/3&#8243;][vc_column_text]<span style=\"font-weight: 400;\">The DSP+FPGA high-speed signal acquisition and processing board is independently developed by ZKey, including TI DSP TMS320C6678 and Xilinx FPGA K7 XC7VK690T. The communication between FPGA and DSP is achieved by high-speed 4-lane 5Gbps SRIO. This system can be used in software radio system, baseband signal processing, wireless simulation platform, high-speed image acquisition and processing, etc.<\/span><\/p>\n<p>&nbsp;<\/p>\n<ul>\n<li style=\"font-weight: 400;\" aria-level=\"1\"><span style=\"font-weight: 400;\">DSP Chip Information<\/span><\/li>\n<\/ul>\n<p><span style=\"font-weight: 400;\">TMS320CC6678 is a new generation of DSP chip launched by TI. Its core, peripheral interface and internal interconnection capabilities have been greatly improved compared to C64x series DSPs. First of all, it has eight processor cores C66x, and the C66x core has both 320GMAC fixed-point and 160GFLOP floating-point processing capabilities. Then, its peripherals integrate a new generation of high-speed interfaces such as SRIO2.1, PCIe2.0 and HyperLink. In addition, the internal interconnection also uses the new TeraNet switch interconnection technology, which has a very high rate.<\/span><\/p>\n<p>&nbsp;<\/p>\n<ul>\n<li style=\"font-weight: 400;\" aria-level=\"1\"><span style=\"font-weight: 400;\">FPGA Chip Information<\/span><\/li>\n<\/ul>\n<p><span style=\"font-weight: 400;\">Xilinx&#8217;s Virtex 7 series FPGA XC7V690T is the main chip, XC7V690T has 693,120 Logic Cells, the largest RAM module is 52,920 Kb, 3,600 DSP Slices, CMT clock management 10, RocketIO GTH 20, the maximum number of used IO 600. Two sets of DDR3 are connected to the FPGA, the capacity is 256Mx32bit.<\/span>[\/vc_column_text][\/vc_column][vc_column width=&#8221;1\/3&#8243;][vc_single_image image=&#8221;781&#8243; img_size=&#8221;medium&#8221; label=&#8221;&#8221;][\/vc_column][\/vc_row][vc_row][vc_column width=&#8221;2\/3&#8243;][vc_column_text]<\/p>\n<table>\n<tbody>\n<tr>\n<td colspan=\"2\"><span style=\"font-weight: 400;\">Power Connection<\/span><\/td>\n<\/tr>\n<tr>\n<td><span style=\"font-weight: 400;\">Connector<\/span><\/td>\n<td><span style=\"font-weight: 400;\">1 x DC plug<\/span><\/td>\n<\/tr>\n<tr>\n<td><span style=\"font-weight: 400;\">Supply Voltage<\/span><\/td>\n<td><span style=\"font-weight: 400;\">DC12V<\/span><\/td>\n<\/tr>\n<tr>\n<td colspan=\"2\"><span style=\"font-weight: 400;\">Environment Condition<\/span><\/td>\n<\/tr>\n<tr>\n<td><span style=\"font-weight: 400;\">Operating Temperature<\/span><\/td>\n<td><span style=\"font-weight: 400;\">-0 <\/span><span style=\"font-weight: 400;\">\u2103 <\/span><span style=\"font-weight: 400;\">~ +60 <\/span><span style=\"font-weight: 400;\">\u2103<\/span><\/td>\n<\/tr>\n<tr>\n<td><span style=\"font-weight: 400;\">Storage Temperature<\/span><\/td>\n<td><span style=\"font-weight: 400;\">-40 <\/span><span style=\"font-weight: 400;\">\u2103 <\/span><span style=\"font-weight: 400;\">~ +85 <\/span><span style=\"font-weight: 400;\">\u2103<\/span><\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n<p>[\/vc_column_text][\/vc_column][vc_column width=&#8221;1\/3&#8243;][vc_single_image image=&#8221;779&#8243; img_size=&#8221;medium&#8221;][\/vc_column][\/vc_row]<\/p>\n","protected":false},"excerpt":{"rendered":"<p>[vc_row full_width=&#8221;stretch_row&#8221; parallax=&#038; [&hellip;]<\/p>\n","protected":false},"author":1,"featured_media":0,"parent":0,"menu_order":0,"comment_status":"closed","ping_status":"closed","template":"","meta":{"footnotes":""},"class_list":["post-776","page","type-page","status-publish","hentry"],"jetpack_sharing_enabled":true,"_links":{"self":[{"href":"https:\/\/www.zkey-tech.com\/index.php\/wp-json\/wp\/v2\/pages\/776","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/www.zkey-tech.com\/index.php\/wp-json\/wp\/v2\/pages"}],"about":[{"href":"https:\/\/www.zkey-tech.com\/index.php\/wp-json\/wp\/v2\/types\/page"}],"author":[{"embeddable":true,"href":"https:\/\/www.zkey-tech.com\/index.php\/wp-json\/wp\/v2\/users\/1"}],"replies":[{"embeddable":true,"href":"https:\/\/www.zkey-tech.com\/index.php\/wp-json\/wp\/v2\/comments?post=776"}],"version-history":[{"count":3,"href":"https:\/\/www.zkey-tech.com\/index.php\/wp-json\/wp\/v2\/pages\/776\/revisions"}],"predecessor-version":[{"id":782,"href":"https:\/\/www.zkey-tech.com\/index.php\/wp-json\/wp\/v2\/pages\/776\/revisions\/782"}],"wp:attachment":[{"href":"https:\/\/www.zkey-tech.com\/index.php\/wp-json\/wp\/v2\/media?parent=776"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}