FMC Daughter Card

n July 2008, with the approval and release of the VITA 57 FPGA Mezzanine Card (FMC: FPGA Mezzanine Card) standard by the American National Standards Institute (ANSI). The FMC standard is jointly developed by companies such as FPGA suppliers and end users. The purpose is to provide standard mezzanine cards, connectors and module interfaces for FPGAs on the carrier board. Decoupling the I/O interface from the FPGA in this way can simplify the design of the I/O interface module and maximize the reuse of the carrier card. Unlike the PMC and XMC standards that use complex interfaces (such as PCI, PCI-x, PCIe or serial RapidIO), the FMC standard only needs to be directly connected to the I/O transceiver interface of the FPGA on the carrier board.


Application of FMC has the following advantages:

  • Data throughput

Support single-ended signal rates up to 10Gbps, and the potential total bandwidth between the mezzanine board and the carrier board is 40Gbps;

  • delay

No additional protocol overhead is required to eliminate delay and ensure data transmission;

  • Simple design

No need to have professional knowledge of protocol standards such as PCI, PCI Express or Serial RapidIO;

  • System overhead

Simplifying system design can reduce power consumption, IP core cost, engineering time and material cost;


  • Design reuse

Whether using a custom internal board design, or a commercial off-the-shelf (COTS: commercial off-the-shelf) mezzanine board or carrier board, the FMC standard can redirect the existing FPGA/carrier board design to the new I/O, so All that needs to be done is to replace the FMC mezzanine board and slightly adjust the FPGA design.