High Speed AD/DA

FMC High-speed ADC 10-bit at 2.6 GSPS Module

  • FPGA Mezzanine Card (FMC) per VITA-57
  • Dual 16-bit ADC up to 310 MSPS (AD9652)
  • Dual 16-bit DAC up to 250MSPS (AD9747)


The is an FPGA Mezzanine Card per VITA 57 specification with a high speed ADC. The ADC converter utilizes the ADI AD9652 device which has a high linearity ADC. The module has an ultra-low jitter wideband PLL Synthesizer for sampling. The front panel RF clock is a reference input clock to the PLL or it could input to the ADC direct sampling clock. The PLL can also receive its reference clock from an on board or the FMC Carrier. The DAC converter utilizes the ADI AD9747 device which has a high linearity DAC.